THE OPTIMIZATION OF ENERGY-EFFICIENCY AND RELIABILITY USING COMPLEX REDUNDANCY IN COMPUTING SYSTEMS
DOI:
https://doi.org/10.15588/1607-3274-2018-3-15Keywords:
energy-efficiency, reliability, fault-tolerant, self-timed circuits, redundancy at transistor-level, complex redundancy.Abstract
Context. The increase of energy-efficiency and reliability of computing systems is still important task in 21st century. It is especiallyimportant in the field of computing systems for aerospace because both the radiation-tolerance should be provided and the
energy-consumption are very limited. Moreover, the developers should take care about performance of a computing system. Therefore, all of this result in difficult optimization task with key-parameters – reliability, energy-efficiency and performance in conditions
of existing technologies limits.
Objective. The solution of optimization task – the synthesis of digital devices that can work in wide temperature and voltage
range at restrictions on reliability probability and performance.
Method. Delay-insensitive (or Self-timed according to Russian terms) circuits can stable operate in delay variation including operation
under ultra-low-supply-voltage (ULSV). That is why it became a good solution for considered task. To increase reliability in
the critical fields of application, the redundancy is often used. For example, the triple modular redundancy or the Hamming codes.
However, the implementing of these methods in delay-insensitive circuits faces problems – excessive increase of complexity or delays
in critical paths. In addition, the Muller’s model are not provide possibilities to take into account failures as normal part of system
operations. Thus, the definitions of fault-tolerance and semi-modularity (the basic feature of delay-insensitive circuits) have a
conflict. In the paper the method of redundancy at transistor level was developed. The combination of proposed and known methods
allows receiving new efficient solutions.
Results. The model of fault-tolerant self-timed circuits was developed. The method of complex redundancy for self-timed circuits
was proposed. This method provides synthesis of digital devices with optimization in key parameters.
Conclusions. The research proved that only the combination of methods provide the achievement of function’s optimum. It is interesting
task to expand the object of research to synchronous and globally asynchronous locally synchronous computing systems in
further research.
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