OPTIMIZATION OF COMPOSITIONAL MICROPROGRAMMING CONTROL UNIT WITH COMMON MEMORY

A. A. Barkalov, L. A. Titarenko, I. Y. Zelenyova, S. A. Tsololo

Abstract


A method for reducing the hardware amount in the circuit of compositional microprogramming control unit with common memory oriented to FPGA technology is proposed . The restrictions of LUT’s input number are taken into account. The method is based on the use of two sources of codes classes of pseudoequivalent operational linear chain and use a multiplexer to choose one of these sources. Also the surplus of FPGA’s embedded memory blocks is used. Such an approach would reduce the number of LUT elements in the addressing subcircuit of compositional microprogramming control unit, that leads to reducing of common hardware amount and price of the unit. An example of the proposed method application is given.

Keywords


compositional microprogramming control unit, operational linear chain, flow-chart of algorithm, FPGA, multiplexer, logic circuit

References


Barkalov, A. Logic synthesis for compositional microprogram control units / A. Barkalov, L. Titarenko. – Berlin : Springer, 2008. – 272 p.

Баркалов, А. А. Синтез микропрограммных автоматов на заказных и программируемых СБИС / А. А. Баркалов, Л. А. Титаренко. – Донецк : УНИТЕХ, 2009. – 336 с.

Barkalov, A. Logic synthesis for FSM-based control units / A. Barkalov, L. Titarenko. – Berlin : Springer, 2009. – 233 p.

Maxfield, S. The Design Warrior’s Guide to FPGAs. – Amsterdam : Elsevier, 2004. – 541 p.

Грушвицкий, Р. И. Проектирование систем на микросхемах с программируемой структурой / Р. И. Грушвицкий, А. Х. Мурсаев, Е. П. Угрюмов. – С.-Пб. : БХВ – Петербург, 2006. – 736 с.

All Programmable Technologies from Xilinx Inc. [электронный ресурс]: ресурс содержит информацию о семействах ПЛИС производства Xilinx Inc – Режим доступа: http://www.xilinx.com – Загл. с экрана.

FPGA CPLD and ASIC from Altera [электронный ресурс]: технические характеристики ПЛИС производства Altera Corporation – Режим доступа: http://www.altera.com. – Загл. с экрана.

Baranov, S. Logic and System Design of Digital Systems / S. Baranov. – Tallinn : TTU, 2008. – 266 p.

Баркалов, А. А. Реализация омпозиционных микропрограммных устройств управления на FPGA-микросхемах / А. А. Баркалов, Л. А. Титаренко, А. Н. Мирошкин // радиоэлектроника и информатика. – 2011. – № 1. – С. 52–55.


GOST Style Citations






DOI: https://doi.org/10.15588/1607-3274-2014-1-20



Copyright (c) 2014 A. A. Barkalov, L. A. Titarenko, I. Y. Zelenyova, S. A. Tsololo

Creative Commons License
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.

Address of the journal editorial office:
Editorial office of the journal «Radio Electronics, Computer Science, Control»,
Zaporizhzhya National Technical University, 
Zhukovskiy street, 64, Zaporizhzhya, 69063, Ukraine. 
Telephone: +38-061-769-82-96 – the Editing and Publishing Department.
E-mail: rvv@zntu.edu.ua

The reference to the journal is obligatory in the cases of complete or partial use of its materials.