IN-MEMORY INTELLIGENT COMPUTING

Authors

  • V. I. Hahanov Kharkiv National University of Radio Electronics, Kharkiv, Ukraine, Ukraine
  • V. H. Abdullayev Azerbaijan State University of Oil and Industry, Baku, Azerbaijan, Azerbaijan
  • S. V. Chumachenko Kharkiv National University of Radio Electronics, Kharkiv, Ukraine, Ukraine
  • E. I. Lytvynova Kharkiv National University of Radio Electronics, Kharkiv, Ukraine, Ukraine
  • I. V. Hahanova Kharkiv National University of Radio Electronics, Kharkiv, Ukraine, Ukraine

DOI:

https://doi.org/10.15588/1607-3274-2024-1-15

Keywords:

Intelligent Computing, Cloud, fog, and edge computing, Big data computing, In-memory computing, Cyber social competing, Hadoop Map-Reduce technique, big data as addresses, truth table, logical vector, similarities-differences, equivalence data, universe of primitives, patterns as a binary vector

Abstract

Context. Processed big data has social significance for the development of society and industry. Intelligent processing of big data is a condition for creating a collective mind of a social group, company, state and the planet as a whole. At the same time, the economy of big data (Data Economy) takes first place in the evaluation of processing mechanisms, since two parameters are very important: speed of data processing and energy consumption. Therefore, mechanisms focused on parallel processing of large data within the data storage center will always be in demand on the IT market.

Objective. The goal of the investigation is to increase the economy of big data (Data Economy) thanks to the analysis of data as truth table addresses for the identification of patterns of production functionalities based on the similarity-difference metric.

Method. Intelligent computing architectures are proposed for managing cyber-social processes based on monitoring and analysis of big data. It is proposed to process big data as truth table addresses to solve the problems of identification, clustering, and classification of patterns of social and production processes. A family of automata is offered for the analysis of big data, such as addresses. The truth table is considered as a reasonable form of explicit data structures that have a useful constant – a standard address routing order. The goal of processing big data is to make it structured using a truth table for further identification before making actuator decisions. The truth table is considered as a mechanism for parallel structuring and packing of large data in its column to determine their similarity-difference and to equate data at the same addresses. Representation of data as addresses is associated with unitary encoding of patterns by binary vectors on the found universe of primitive data. The mechanism is focused on processorless data processing based on read-write transactions using in-memory computing technology with significant time and energy savings. The metric of truth table big data processing is parallelism, technological simplicity, and linear computational complexity. The price for such advantages is the exponential memory costs of storing explicit structured data.

Results. Parallel algorithms of in-memory computing are proposed for economic mechanisms of transformation of large unstructured data, such as addresses, into useful structured data. An in-memory computing architecture with global feedback and an algorithm for matrix parallel processing of large data such as addresses are proposed. It includes a framework for matrix analysis of big data to determine the similarity between vectors that are input to the matrix sequencer. Vector data analysis is transformed into matrix computing for big data processing. The speed of the parallel algorithm for the analysis of big data on the MDV matrix of deductive vectors is linearly dependent on the number of bits of the input vectors or the power of the universe of primitives. A method of identifying patterns using key words has been developed. It is characterized by the use of unitary coded data components for the synthesis of the truth table of the business process. This allows you to use read-write transactions for parallel processing of large data such as addresses.

Conclusions. The scientific novelty consists in the development of the following innovative solutions: 1) a new vector-matrix technology for parallel processing of large data, such as addresses, is proposed, characterized by the use of read-write transactions on matrix memory without the use of processor logic; 2) an in-memory computing architecture with global feedback and an algorithm for matrix parallel processing of large data such as addresses are proposed; 3) a method of identifying patterns using keywords is proposed, which is characterized by the use of unitary coded data components for the synthesis of the truth table of the business process, which makes it possible to use the read-write transaction for parallel processing of large data such as addresses. The practical significance of the study is that any task of artificial intelligence (similarity-difference, classification-clustering and recognition, pattern identification) can be solved technologically simply and efficiently with the help of a truth table (or its derivatives) and unitarily coded big data . Research prospects are related to the implementation of this digital modeling technology devices on the EDA market. KEYWORDS: Intelligent

Author Biographies

V. I. Hahanov, Kharkiv National University of Radio Electronics, Kharkiv, Ukraine

Dr. Sc., Professor of the Design Automation Department

V. H. Abdullayev, Azerbaijan State University of Oil and Industry, Baku, Azerbaijan

PhD, Associate Professor of the Computer Engineering Department

S. V. Chumachenko, Kharkiv National University of Radio Electronics, Kharkiv, Ukraine

Dr. Sc., Professor, Head of the Design Automation Department

E. I. Lytvynova, Kharkiv National University of Radio Electronics, Kharkiv, Ukraine

Dr. Sc., Professor of the Design Automation Department

I. V. Hahanova, Kharkiv National University of Radio Electronics, Kharkiv, Ukraine

Dr. Sc., Professor of the Design Automation Department

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Published

2024-04-02

How to Cite

Hahanov, V. I., Abdullayev, V. H., Chumachenko, S. V., Lytvynova, E. I., & Hahanova, I. V. (2024). IN-MEMORY INTELLIGENT COMPUTING . Radio Electronics, Computer Science, Control, (1), 161. https://doi.org/10.15588/1607-3274-2024-1-15

Issue

No. 1 (2024): Radio Electronics, Computer Science, Control

Section

Neuroinformatics and intelligent systems

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Copyright (c) 2024 V. I. Hahanov, V. H. Abdullayev, S. V. Chumachenko, E. I. Lytvynova, I. V. Hahanova

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