IMAGE CONTOUR SEGMENTATION IN HARDWARE

Dimitrios Amanatidis, Michael Dossis, Iosif Androulidakis

Abstract


The use of Behavioural Synthesis for hardware generation of a contour-based image segmentation method is considered. The segmentation
method chosen, is a well-known, state-of-the-art, robust, efficient and fast-converging one, that combines functionals depending on the curve geometry and image properties in a level-set framework. The cost function sought to be minimized, is formulated as a weighted sum of three integral measures; a robust alignment term that leads the evolving surface to the edges of the desired object, a minimal variance term that measures the homogeneity inside and outside the object, and a geodesic active surface term that is used mainly for regularization. The algorithm is initially implemented in MatLab and ADA and subsequently, it is ported to our Behavioural Synthesis tool, the CCC HLS framework, which is capable of delivering correct-by-construction RTL VHDL implementations of computation-intensive applications. This way, behavioural ADA specifications are transformed into RTL micro-architectures which then can be easily implemented by commercial RTL synthesizers.

Keywords


Image Contour Segmentation, High Level Synthesis, Custom Coprocessors Compilation, FPGA Implementation.

References


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DOI: https://doi.org/10.15588/1607-3274-2015-4-10



Copyright (c) 2016 Dimitrios Amanatidis, Michael Dossis, Iosif Androulidakis

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